![]() ![]() Booting such a system involved uploading a bootstrapper which was actually a virus. We could stuff 20 boards into an external case, slot the ISA serial link card into a host system, hook it all up and let ‘er rip. We had a board which provided a Transputer-compatible serial link to the ISA bus, with all the other boards just using power and ground. The T805 ran at 30 MHz, while the others maxed out at 20 or 25. These were all 32-bit processors WITH hardware floating point, 4 KiB built into the chip and 4 serial interfaces. They had offerings with the T800, T801 and T805. The T425 was the second-generation chip, with the T400 being a stripped down version of the T425. ![]() Both of these were 32-bit processors, no hardware floating point, 4 KiB built into the chip and 4 serial interfaces. They had multiple offerings with the T414 (and, later, T425), anywhere from 1 MB to 4 MB RAM per chip, up to processors on one board. That was a 32-bit processor, no hardware floating point, only 2KiB built into the chip (not cache the RAM was actually in the memory map, meaning you could run small programs on the chip with no external RAM) and only 2 serial interfaces. They had an entry-level board with a T400. I think they ended up selling their stuff to Novell never heard another word about it, after that. Another startup in the area was prototyping a RAID-based SQL server using this hardware, along with other, processor boards. They had a SCSI interface tied to a 16-bit T212. They were shipping Transputer hardware at the time. In 1990, I took an entry-level job with Computer System Architects in Provo, Utah. Posted in computer hacks, Microcontrollers, Retrocomputing Tagged emulator, Raspberry Pi Pico, rp2040, transputer Post navigation You can find the links to the rest of those videos on his YouTube channel. Listen to explain the project in the first of a (so far) six video series. Future plans are to figure out a better system to compile code, as right now the only way is by running the original INMOS compiler on DOS in a VM. The transputer architecture allows code to be loaded via a ROM, or through the links. To see what’s actually going on, sourced some link adapter chips (IMSC011), interfacing them through an Arduino Mega to a computer to use the keyboard and display. Furthermore, the link speed is spec’d at 10 MHz which is well within the Pico’s capabilities, and since the RP2040 runs at 133 MHz, it’s conceivable that an emulated core can get close to the 20 MHz top speed of the original transputers.īringing up the hardware has been a success. ![]() That matches up perfectly with the four transputer links (each is bi-directional so you need eight state machines). The RP2040 chip on the Pico board has two programmable input/output blocks (PIOs), each with four state machines in them. However, the RP2040 chip found on the Raspberry Pi Pico struck him as the perfect way to emulate the transputer design. It was expensive back then and today, finding multiple transputers is both difficult and costly. has wanted to play with the architecture since its inception. Targetting parallel computing, each transputer chip has four serial communication links for connecting to other transputers. Such is the case with the working transputer that has built using a Raspberry Pi Pico.įor a thorough overview of the transputer you should check out longer article on the topic but boiled down we’re talking about a chip architecture mostly forgotten in time. ![]() You can’t fake that feeling when a $4 microcontroller dev board can stand in as cutting-edge 1980s technology. ![]()
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